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Table of Contents |
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Introduction
AS7726-32X, AS7326-56X, N8550-48B8C and N8550-32C have two 10G-Base-KR ports (10G-KR) on the front panel to support additional high-speed link between CPU and ASIC (switch chip). PICOS supports to configure the two 10G-Base-KR ports as two 10G SFP+ front panel data ports or they can be configured to provide additional high speed links between the switch CPU and ASIC.
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Supported Platforms
Currently only AS7726-32X, AS7326-56X, N8550-48B8C and N8550-32C switches have the 10G-Base-KR ports which can be configured as two 10G SFP+ data ports on the front panel or as two 10G-KR management ports linked to CPU. By default, 10G-Base-KR ports are disabled.
Configuration
This section describes how to configure the two 10G-Base-KR ports as front panel ports or management ports linked to CPU.
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- From the Linux shell prompt, run sudo picos_boot management-port-mapping command to configure the 10G-Base-KR ports as two 10G-KR management ports linked to CPU. The option [3] No me Port(s) indicates that the 10G-Base-KR ports are disabled. Only AS7726-32X and AS7326-56X support to disable the 10G-Base-KR ports.
Code Block |
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admin@PICOS:~$ sudo picos_boot management-port-mapping [1] To Host CPU [2] To Front Panel [3] No me Port(s) * default Enter your choice(1,2,3):1 To Host CPU is selected. Please restart the PICOS service |
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